Q: The Von Neumann Architecture GCSE

What is special about the Von Neumann Architecture?

What is an instruction set?

What is a ‘register’ when discussing CPU’s?

Which register is responsible for keeping count of the Fetch-Decode-Execute cycles?

Which register is responsible for storing the ‘address’ of the next instruction required by the CPU?

Which register is responsible for initially storing the next instruction/item of data required by the CPU?

Which register is responsible for storing intermediate result from each calculation, at the end of each Fetch-Decode-Execute cycle?

In assembly language, what does the mnemonic “LDA” mean?

In assembly language, what does the mnemonic “STA” mean?

In assembly language, what does the mnemonic “ADD” mean?